Working on understanding GNU Make

Start with the files:

a.c a.h b.c b.h c.c c.h d.c

Create the object files by compiling and assembling:

gcc -c a.c   ==> a.o

gcc -c b.c  ==> b.o

gcc -c c.c  ==> c.o

gcc -c d.c  ==> d.o

Link all of the files:

gcc -o output *.o  ==> output

Files:

a.c
#include "a.h"

int add(int a, int b)
{
    return a + b;
}

a.h
int add(int a, int b);

b.c
#include "b.h"

int multiply(int a, int b)
{
    return a * b;
}

b.h
int multiply(int a, int b);

c.c
#include "c.h"

int merge(int a, int b)
{
    return multiply(a,b) / multiply(a,b);
}

c.h
#include "a.h"
#include "b.h"

int merge(int a, int b);

d.c
#include "c.h"
#include <stdio.h>

int main()
{
   int a = 121;
   int b = 5;
   int c = merge(a,b);
   printf("here is the merge %d\n",c);
}

How do I build a makefile that does this???

Makefile:

d : a.o b.o c.o d.o
    cc -o d a.o b.o c.o d.o
a.o : a.c a.h
    cc -c a.c
b.o : b.c b.h
    cc -c b.c
c.o : c.c a.o b.o
    cc -c c.c
d.o : d.c c.o
    cc -c d.c

Commands followed to compile:

make

++++++++++++++++++++++++++++++++++

use make test:

https://stackoverflow.com/questions/4927676/implementing-make-check-or-make-test